Virtual machine technology generally allows a guest operating system to run on host computer. The host computer may comprise, for example, host hardware, a host operating system and/or hypervisor software that may manage guests, and emulator software that emulates a hardware environment for the guest. As an example, the Virtual PC software created by the former CONNECTIX® Corporation of San Mateo, Calif., emulates an entire computer hardware architecture for a guest operating system, including an INTEL® 80X86 Pentium processor and various motherboard components and cards.
Within a traditional virtualization environment, memory access by the guest operating system is slowed by multiple levels of address translation, as can be appreciated with reference to FIG. 1. An application running in the guest operating system will utilize a guest logical address space 101. Addresses 112, 113, 114 in the guest logical address space 101 are mapped to a guest “physical” address space 102, e.g., to addresses 121, 125 and 129. The guest “physical” address space 102 appears to be a physical address space to the guest, but in fact it is an emulated address space supported by emulation software running on a host computer. As far as the guest is concerned, it must only keep track of how addresses in the guest logical address space 101 correspond to addresses in the in the guest “physical” address space 102 by means of look-up tables and the like, as would an ordinary operating system. This presents a first layer of translation that occurs.
Using traditional virtualization approaches, emulation software will also use a logical address space 103 and a physical address space 104. A translation table will be kept to translate guest physical addresses 121, 125, 129 into host logical addresses 142, 151, 157, and yet another translation will be carried out to map host logical addresses 142, 151, 157 to host physical addresses 162, 166, 172. This presents two additional layers of translation. Only after these translations occur can the appropriate data be retrieved from host memory.
In other words, in order to support guest operating system access to host hardware, at least three layers of translation are performed in traditional systems. First, the guest translates logical addresses to physical addresses, next the host translates guest physical addresses to host logical addresses, and finally the host translates host logical addresses to host physical addresses. Only after these translations occur can host hardware operate on the resulting host physical addresses, which affect the original buffer of memory stored within the original guest logical address space.
As can be appreciated from FIG. 1, the traditional model presents numerous levels of indireaction in memory access operations. Each level of indireaction costs valuable processor clock cycles and slows the performance of the guest operating system. In view of this and other difficulties in supporting a guest operating system, solutions are needed which will increase the efficiency of memory access by a guest operating system.